Half Adder & Full Adder: Binary Addition Visualized

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1 + 1 = 10₂ — Sum=0, Carry=1

Adding 1+1 in binary produces sum bit 0 with carry bit 1, giving the binary result 10 (decimal 2). The half adder uses one XOR gate for the sum and one AND gate for the carry.

Formula

Half adder: Sum = A ⊕ B, Carry = A · B
Full adder: Sum = A ⊕ B ⊕ Cin, Cout = (A · B) + (Cin · (A ⊕ B))
Ripple-carry delay = N × t_gate (for N-bit adder)

The Simplest Arithmetic Circuit

The half adder is the simplest circuit that performs binary addition. It takes two 1-bit inputs — A and B — and produces two outputs: a sum bit (A XOR B) and a carry bit (A AND B). With just two gates, it computes 0+0=0, 0+1=1, 1+0=1, and 1+1=10 in binary. It's the atomic unit of all digital arithmetic.

Full Adder: Adding the Carry

The full adder extends the half adder by accepting a carry-in bit from a previous stage. It computes Sum = A XOR B XOR Cin, and Carry-out = (A AND B) OR (Cin AND (A XOR B)). This three-input design allows full adders to be chained together, each stage feeding its carry-out to the next stage's carry-in, forming a ripple-carry adder.

Ripple-Carry Adder

To add two N-bit numbers, N full adders are connected in series. The least significant bit's carry-in is 0, and each subsequent stage waits for the carry from the previous one. This ripple effect means the worst-case delay grows linearly with N — an 8-bit adder is 8 times slower than a 1-bit adder. For this reason, fast processors use parallel prefix adders.

Modern Adder Architectures

Real CPUs use carry-lookahead, carry-select, or Kogge-Stone adders that compute carries in O(log N) time instead of O(N). The carry-lookahead adder precomputes "generate" and "propagate" signals for each bit, then combines them in a tree structure. These designs use more gates but operate at multi-GHz frequencies — the price we pay for speed.

FAQ

What is the difference between a half adder and a full adder?

A half adder takes two single-bit inputs (A and B) and produces a sum and carry. A full adder adds three inputs: A, B, and a carry-in from a previous stage. Full adders can be chained to build multi-bit adders, while half adders cannot handle carry propagation.

How does a ripple-carry adder work?

A ripple-carry adder chains N full adders together, with each stage's carry-out connected to the next stage's carry-in. The carry 'ripples' through from least significant to most significant bit. While simple, this creates O(N) propagation delay.

Why are carry-lookahead adders faster?

Carry-lookahead adders compute all carry bits in parallel using generate and propagate signals, reducing delay from O(N) to O(log N). They use more gates but are essential for high-speed arithmetic in modern processors.

How many gates does a full adder need?

A full adder requires two XOR gates, two AND gates, and one OR gate — a total of five gates. It can also be built from two half adders and an OR gate, or from nine NAND gates.

Sources

Embed

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